Field-Programmable Gate Array (FPGA) is pre-fabricated silicon device that can be electrically programmed to become almost any kind of digital circuit or system.



FPGA devices provide a number of compelling advantages over fixed-function Application Specific Integrated Circuit (ASIC) technologies such as standard cells: ASICs typically take months to fabricate and cost hundreds of thousands to millions of dollars to obtain the first device; FPGAs are configured in less than a second (and can often be reconfigured if a mistake is made) and cost anywhere from a few dollars to a few thousand dollars.

The flexible nature of an FPGA comes at a significant cost in area, delay, and power consumption: an FPGA requires approximately 20 to 35 times more area than a standard cell ASIC, has a speed performance roughly 3 to 4 times slower than an ASIC and consumes roughly 10 times as much dynamic power. These disadvantages arise largely from an FPGA’s programmable routing fabric which trades area, speed, and power in return for “instant” fabrication.

Despite these disadvantages, FPGAs present a compelling alternative for digital system implementation based on their fast-turnaround and low volume cost. For small enterprises or small entities within large corporations, FPGAs provide the only economical access to the scalability and performance provided by Moore’s law. As Moore’s law progresses,the ensuing difficulties brought about by state-of-the-art deep sub micron processes make ASIC design more difficult and expensive.The investment required to produce a useful ASIC consists of several very large items in terms of time and money:

  • State-of-the-art ASIC CAD tools for synthesis, placement, routing, extraction, simulation, timing analysis, and power analysis are extremely costly.
  • The mask costs of a fully-fabricated device can be millions of dollars. This cost can be reduced if prototyping costs are shared among different, smaller ASICs, or if a “structured ASIC” approach, which requires fewer masks, is used.
  • The loaded cost of an engineering team required to develop a large ASIC over multiple years is huge. (This cost would be related, but smaller for an FPGA design team.)
These high costs, and the need for a proportionally higher return on investment, drive most digital design starts toward FPGA implementation. The two essential technologies which distinguish FPGAs are architecture and the computer-aided design (CAD) tools that a user must employ to create FPGA designs.

FPGAs consist of an array of programmable logic blocks of potentially different types, including general logic, memory and multiplier blocks, surrounded by a programmable routing fabric that allows blocks to be programmably interconnected. The array is surrounded by programmable input/output blocks, labeled I/O in the figure, that connect the chip to the outside world.

The “programmable” term in FPGA indicates an ability to program a function into the chip after silicon fabrication is complete. This customization is made possible by the programming technology, which isa method that can cause a change in the behavior of the pre-fabricated chip after fabrication, in the “field,” where system users create designs.

FPGA History

Around the beginning of the 1980s, it became apparent that there was a gap in the digital IC continuum. At one end,there were programmable devices like SPLDs and CPLDs, which were highly configurable and had fast design and modification times, but which couldn’t support large or complex functions.

At the other end of the spectrum were ASICs. These could support extremely large and complex functions, but they were painfully expensive and time-consuming to design. Furthermore, once a design had been implemented as an ASIC it was effectively frozen in silicon.

In order to address this gap, Xilinx developed a new class of IC called a field-programmable gate array, or FPGA, which they made available to the market in 1984. Note that the first FPGAs were based on CMOS and used SRAM cells for configuration purposes. Although these early devices were comparatively simple and contained relatively few gates (or the equivalent thereof) by today’s standards, many aspects of their underlying architecture are still employed to this day.

The early devices were based on the concept of a programmable logic block, which comprised a 3-input lookup table (LUT), a register that could act as a flip-flop or a latch, and a multiplexer, along with a few other elements that are of little interest here.

Each FPGA contained a large number of these programmable logic blocks. By means of appropriate SRAM programming cells, every logic block in the device could be configured to perform a different function. Each register could be configured to initialize containing a logic 0 or a logic 1 and to act as a flip-flop or a latch. If the flip-flop option were selected, the register could be configured to be triggered by a positive- or negative-going clock (the clock signal was common to all of the logic blocks). The multiplexer feeding the flip-flop could be configured to accept the output from the LUT or a separate input to the logic block, and the LUT could be configured to represent any 3-input logical function.

The complete FPGA comprised a large number of programmable logic block “islands” surrounded by a “sea” of programmable interconnects. As usual, this high-level illustration is merely an abstract representation. In reality, all of the transistors and interconnects would be implemented on the same piece of silicon using standard IC creation techniques.

In addition to the local interconnect, there would also be global (high-speed) interconnection paths that could transport signals across the chip without having to go through multiple local switching elements.

The device would also include primary I/O pins and pads. By means of its own SRAM cells, the interconnect could be programmed such that the primary inputs to the device were connected to the inputs of one or more programmable logic blocks, and the outputs from any logic block could be used to drive the inputs to any other logic block, the primary outputs from the device, or both.

The end result was that FPGAs successfully bridged the gap between PLDs and ASICs. On the one hand, they were highly configurable and had the fast design and modification times associated with PLDs. On the other hand, they could be used to implement large and complex functions that had previously been the domain only of ASICs. ASICs were still required for the really large, complex, high-performance designs, but as FPGAs increased in sophistication, they started to encroach further and further into ASIC design space.

Why Use an FPGA?

System-Level-Integration (SLI) using reprogrammable FPGA technology is made possible by advances in IC wafer technology especially in the area of deep submicron lithography. Today, state-of-the-art waferfabs find FPGAs an excellent mechanism for testing new wafer technology because of their reprogrammable nature. Incidentally, this trend in the wafer fabs means that FPGA companies have early access to the newest deep sub-micron technologies, dramatically increasing the number of gates available to designers as well as reducing the average gate cost sooner in the technology life-cycle than before. This trend, together with innovative system level architecture features, is leading FPGAs to become the preferred architecture for SLI.

FPGA Manufacturers

Xilinx

Xilinx is the world’s leading provider of programmable platforms withmore than 50 percent market share in the programmable logic device (PLD) segment of the semiconductor industry. Xilinx programmable chips are the innovation platform of choice for today’s leading companies for the design of tens of thousands of products that improve the quality of our everyday lives. Due to their inherent flexibility, Xilinx award-winning programmable solutions – silicon, software, IP, evaluation kits and reference designs – are used by more than 20,000 customers.

Altera

Headquartered in Silicon Valley, Altera Corporation is the leader in innovative custom logic solutions, and has been ever since inventing the world’s first reprogrammable logic device in 1984. Today, over 2,600 employees in 19 countries are providing even more ingenious custom logic solutions – addressing a range of concerns, from power consumption to performance to cost – for customers in a wide variety of industries, including automotive, broadcast, computer and storage, consumer, industrial, medical, military, test and measurement, wireless, and wireline. In addition to devices, Altera’s comprehensive solutions portfolio contains fully integrated software development tools, versatile embedded processors, optimized intellectual property (IP) cores, reference designs examples, and a variety of development kits.

Lattice Semiconductor

Lattice is the source for innovative FPGA, PLD, programmable Power Management and Clock Management solutions. Lattice designs and develops programmable logic products, which allow the end customer to determine functionality. Their customers are primarily original equipment manufacturers in the communications, computing, consumer, industrial, automotive, medical and military end markets.

Actel

Actel Corporation is the leading supplier of nonvolatile, low-power programmable technologies. The company's mission is to manage power consumption at both the chip and system level, leveraging the industry's lowest power FPGAs and unique mixed-signal FPGAs to offer system designers a competitive edge. Actel's history of reliability, coupled with its unique flash-based technology, sets them apart from traditional FPGA manufacturers. Whether you're designing applications for consumer and portable medical markets, tomorrow's environmentally friendly data centers, industrial controls, and the automotive, space and military/aerospace markets, power matters.

Achronix

Achronix Semiconductor is a privately held fabless corporation based in San Jose, California. Achronix builds the world's fastest field programmable gate arrays (FPGAs) which use a unique patented circuit technology, providing 1.5 GHz throughput, a significant performance advantage over traditional FPGA technology.